The present disclosure relates, in general to memory devices, and more particularly, to a nonvolatile memory device and method of making the same.
It has been shown that non-volatile memory single-transistor bitcells having a dielectric with embedded silicon nanocrystals can be charged with electrons using hot carrier injection (HCI injection), HCI injection with reverse well/source bias, or Fowler-Nordheim (FN) tunneling. The nanocrystals can be discharged with Fowler-Nordheim tunneling through either a top or a bottom dielectric with respect to the nanocrystals. The array architecture considerations of either FN tunneling program/erase or HCI program/FN erase for single-transistor bitcells are also understood. While vertical FN programming is a very low current operation, it results in a long programming time (e.g., on the order of 1-10 msec) and an inefficient bitcell with either two transistors per bitcell or two parallel conductors in a bitline direction. HCI programming results in an efficient bitcell and fast programming (e.g., on the order of 1-10 xcexcsec) at the expense of high programming current (e.g., on the order of 100-200 xcexcA).
It also has been shown that source-side injection in a split-gate bitcell in combination with an oxide-nitride-oxide (ONO) storage layer can be used with either hot hole erase or with erase through the thin top oxide of a SONOS device. However, hot hole erase results in oxide degradation leading to read disturb, and thin top oxide erase of an ONO layer results in susceptibility to read disturb for erase times on the order of between 100 msec to 1 sec.
Accordingly, a bitcell combining high reliability program/erase operations and low write power is needed.